1. Field of Invention
The present invention relates, in general, to a read only memory (ROM) device, and more particularly, to a ROM device having memory units arranged in three dimensions, and a method of making the same.
2. Description of Related Art
ROM devices are widely used inside personal computers, microprocessors and other digital systems. In general, a ROM device is typically used as the main memory device for the storage of information in digital systems. The ROM devices used in different equipment are basically identical in structure, except for their coded contents. As such, manufacturers typically fabricate semi-finished ROM devices which are complete with the exception of the actual program coding step. The semi-finished ROM devices are then stocked by the manufacturer. Once the customer supplies the desired codes to the manufacturer, the manufacturer can rapidly fabricate the necessary set of coding masks according to the customer's requirements and standards, so that the coding implantation can be immediately performed. After the completion of the coding implantation and other subsequent steps, the finished ROM devices can be supplied to the customer in a fast and efficient manner. Hence, methods of making ROM devices that use programming masks in a later part of the manufacturing cycle are preferred by the industry.
From the perspective of an integrated circuit manufacturer, major issues include the reduction of the area occupied by the integrated circuits, increasing the level of integration, the reduction of production costs, and increasing market share.
However, in a conventional ROM device, each gate region, comprised for example of polysilicon, is formed on the same planar surface as the other gate regions. This requires a relatively large footprint. Once the characteristic dimensions of the ROM device have been reduced to their ultimate limits (such as line separation, line width, or channel width), the surface area occupied by the integrated circuit cannot be further reduced, and therefore production costs cannot be further reduced.
FIG. 1a shows the structure of a conventional ROM device. The manufacture of a conventional ROM device includes forming an array of parallel, embedded source/drain regions 11 (composed of, for example, an N-type material) above a substrate 10 (for example, a P-type substrate). A gate oxide layer 12 is formed above the substrate 10, and a polysilicon gate layer 13 is formed above the gate oxide layer 12. The term "source/drain region" refers to both a source or a drain terminal. As such, each source/drain region 11 is either a source or a drain terminal, as determined solely by the metallic wiring connection.
Referring next to FIG. 1b, in a subsequent coding step, a patterned photoresist layer 15 is formed above the polysilicon gate layer 13, so that polysilicon gate regions 13' are exposed. These exposed regions will form memory cells having an OFF state, as will be subsequently described. Then, and referring to FIG. 1c, impurities are implanted into the channel region 16 using an ion implantation method. As a result, the threshold voltage of these memory cells are changed, with their memory content being permanently fixed in the OFF state. Finally, the photoresist layer 15 is removed to complete the manufacturing of a conventional ROM device.
As described before, all polysilicon gate regions 13' are located on the same planar surface; therefore, for every two polysilicon gate regions 13', a predetermined gap must exist therebetween, which makes any further reduction in the area occupied by the ROM device difficult.